The invention relates to a signal processor comprising
at least one data source, PA1 a plurality of input registers whose inputs are coupled to the data source by data buses, PA1 processing means for processing data buffered in the input registers by arithmetic and/or logic operations which processing means are spread over a plurality of parallel data processor branches.
Signal processors are specific microprocessors having a high computing speed, whose instruction sets and architectures are attuned to specific requirements in the range of digital signal processing and which are particularly used for converting complex algorithms in real time. For example, signal processors are used in the field of mobile radio according to the GSM standard where they are used in mobile radio terminals or radio base stations for converting complex signal processing algorithms. Further fields of application are, for example, audio, video, medical and automotive technology, such as DECT systems (Digital European Cordless Telephone), ISDN systems (Integrated Services Digital Network) or digital radio.
From DE-A 43 44 157, a conterpart of which is U.S. Pat. No. 5,799,201 is known a signal processor of the type defined in the opening paragraph. The signal processor described there comprises a plurality of input registers coupled to a data source by two data buses. Only a first part of the input registers is directly connected to the data buses. Data to be processed are transmitted to the second part of the input registers via the first part of the input registers. In this manner, the data transmitted to the second part of the input registers are delayed. The data applied to the input registers are processed in parallel. They are applied to multipliers whose output values (products) are further processed in parallel by means of arithmetic/logic units (ALU) and accumulator registers.
Such signal processors are suitable for the accelerated computation of autocorrelation and cross-correlation functions. Furthermore, faster digital FIR filters can be realized with such signal processors. However, other algorithms, such as, for example, algorithms for determining the Fast Fourier Transform (FFT) or LTP (Long-Term Prediction) algorithms in the field of speech processing cannot be accelerated with such signal processors, or only to a limited extent.